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Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC with Partial Vcm-Based Switching Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017,Volume: 25,Issue: 3,Page: 1168-1172
作者:  Dezhi Xing;  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Fan Ye;  Junyan Ren;  Seng-Pan U;  Rui Paulo Martins
收藏  |  浏览/下载:14/0  |  提交时间:2019/02/11
Common Mode Variation  Partial Vcm-based Switching  Time-interleaved Successive ApproximaTion Register Analog-to-digital Converter (Ti Sar Adc)  
Split-SAR ADCs: Improved linearity with power and speed optimization Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014,Volume: 22,Issue: 2,Page: 372-383
作者:  Yan Zhu;  Chi-Hang Chan;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
收藏  |  浏览/下载:7/0  |  提交时间:2018/10/30
Linearity Analysis  Linearity Calibration  Sar Adcs  Split Dac  Vcm-based Switching  
A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS Conference paper
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, PEOPLES R CHINA, MAY 19-23, 2013
作者:  Wen-Lan Wu;  Yan Zhu;  Li Ding;  Chi-Hang Chan;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
收藏  |  浏览/下载:9/0  |  提交时间:2019/02/11