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Design of Very High-Frequency Multirate Switched-Capacitor Circuits – Extending the Boundaries Of CMOS Analog Front-End Filtering Book
US:Springer US, 2006
Authors:  U Seng Pan;  Martins Rui Paulo;  Epifanio da Franca Jose de Albuquerque
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Cmos  Cmos Analog Integrated Circuit  Filter  Front-end Filtering  Gain & Offset Compensation  High-frequency  Multirate Signal Processing  Secs  Switched-capacitor  The Kluwer International Series In engIneerIng And Computer  Timing-mismatch And Jitter  Calculus  Consumption  Integrated Circuit  
Exact spectra analysis of sampled signals with jitter-induced nonuniformly holding effects Journal article
IEEE Transactions on Instrumentation and Measurement, 2004,Volume: 53,Issue: 4,Page: 1279-1288
Authors:  U S.-P.;  Sin S.-W.;  Martins R.P.
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A generalized timing-skew-free, multi-phase clock generation platform for parallel sampled-data systems Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Vancouver, BC, Canada, 5 23, 2004 - 5 26, 2004
Authors:  Sin, Sai-Weng;  U, Seng-Pan;  Martins, R.P.
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Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, BANGKOK, THAILAND, MAY 25-28, 2003
Authors:  Sin S.-W.;  Martins R.P.;  Franca J.E.;  Seng-Pan U
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Spectra analysis of nonuniformly holding signals for time-interleaved systems with timing mismatches Conference paper
Conference Record - IEEE Instrumentation and Measurement Technology Conference, VAIL, CO, MAY 20-22, 2003
Authors:  Sin S.-W.;  Martins R.P.;  U, SP
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Signal Analysis  Timing  Signal Processing  Frequency  Clocks  Signal Sampling  Jitter  Silicon Compounds  Closed-form Solution  Error Analysis  
Bandpass Sigma-Delta Modulator SIMULINK® Non-Idealities Model with Behavior Simulation Conference paper
2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, Beijing, PEOPLES R CHINA, OCT 21-24, 2003
Authors:  Lao, CI;  U, SP;  Martins, RP
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