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Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC Conference paper
Authors:  Wang, Guancheng;  Li, Cheng;  Zhu, Yan;  Zhong, Jianyu;  Lu, Yan;  Chan, Chi-Hang;  Martins, Rui P.
Favorite | View/Download：51/0 | TC[WOS]:2 TC[Scopus]:2 | Submit date：2018/10/30
Gain error calibration  testing signal generation  SAR ADC  bridge DAC  low-dropout (LDO) regulator  
Missing-Code-occurrence probability calibration technique for DAC nonlinearity with supply and reference circuit analysis in a SAR ADC Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 11,Page: 3707-3719
Authors:  Wang G.;  Li C.;  Zhu Y.;  Zhong J.;  Lu Y.;  Chan C.-H.;  Martins R.P.
Favorite | View/Download：17/0 | TC[WOS]:2 TC[Scopus]:2 | Submit date：2019/02/11
bridge DAC  Gain error calibration  low-dropout (LDO) regulator  SAR ADC  testing signal generation  
Gain Error Calibrations for Two-Step ADCs: Optimizations Either in Accuracy or Chip Area Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018,Volume: 26,Issue: 11,Page: 2279-2289
Authors:  Wang, Guan Cheng;  Zhu, Yan;  Chan, Chi-Hang;  Seng-Pan, U.;  Martins, Rui P.
Favorite | View/Download：21/0 | TC[WOS]:1 TC[Scopus]:1 | Submit date：2019/01/17
Bridge digital-to-analog converter (DAC)  gain error calibration  successive approximation register (SAR)  analog-to-digital converters (ADCs)  testing signal generation (TSG)  
A 12b 180MS/s 0.068mm2 with Full-Calibration-Integrated Pipelined-SAR ADC Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2017,Volume: 64,Issue: 7,Page: 1684-1695
Authors:  Jianyu Zhong;  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite | View/Download：29/0 | TC[WOS]:12 TC[Scopus]:12 | Submit date：2019/02/11
Analog-to-digital Converter (Adc)  Low Power  Successive Approximation Architecture  Switched-capacitor Circuits  
A 12b 180MS/s 0.068mm(2) With Full-Calibration-Integrated Pipelined-SAR ADC Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 7,Page: 1684-1695
Authors:  Zhong, Jianyu;  Zhu, Yan;  Chan, Chi-Hang;  Sin, Sai-Weng;  U, Seng-Pan;  Martins, Rui Paulo
Favorite | View/Download：30/0 | TC[WOS]:12 TC[Scopus]:12 | Submit date：2018/10/30
Analog-to-digital converter (ADC)  successive approximation architecture  low power  switched-capacitor circuits  
A 10-bit 500-MS/s Partial-Interleaving Pipelined SAR ADC With Offset and Reference Mismatch Calibrations Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017,Volume: 25,Issue: 1,Page: 354-363
Authors:  Zhu, Yan;  Chan, Chi-Hang;  Pan, Seng U.;  Martins, Rui Paulo
Favorite | View/Download：31/0 | TC[WOS]:8 TC[Scopus]:8 | Submit date：2018/10/30
Offset Calibration  Partial Interleaving (Pi)  Pipelined-sar  Stage-gain Error Calibration  
A Sub-GHz wireless transmitter utilizing a multi-class-linearized PA and time-domain wideband-auto I/Q-LOFT calibration for IEEE 802.11af WLAN Journal article
IEEE Transactions on Microwave Theory and Techniques, 2015,Volume: 63,Issue: 10,Page: 3228-3241
Authors:  Ka-Fai Un;  Wei-Han Yu;  Chak-Fong Cheang;  Gengzhen Qi;  Pui-In Mak;  Rui P. Martins
Favorite | View/Download：9/0 | TC[WOS]:6 TC[Scopus]:0 | Submit date：2019/02/11
Adjacent Channel Leakage Ratio (Aclr)  Cmos  Digital Calibration  Gm-c Low-pass Filter  Harmonic Rejection Mixer (Hrm)  Harmonic Rejection Ratio (Hrr)  Ieee 802.11af  Image Rejection Ratio (Irr)  In-phase/quadrature (I/q) Imbalance  Lo Feedthrough (Loft)  Lo-leakage Rejection Ratio (Lrr)  Local Oscillator (Lo)  Power Amplifier (Pa)  Transmitter (Tx)  Wideband  
A 12-bit 110MS/s 4-stage single-opamp pipelined SAR ADC with ratio-based GEC technique Conference paper
2012 Proceedings of the ESSCIRC (ESSCIRC), Bordeaux, France, 17-21 Sept. 2012
Authors:  Rui Wang;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Zhihua Wang;  Rui Paulo Martins
Favorite | View/Download：10/0 | TC[WOS]:0 TC[Scopus]:13 | Submit date：2019/02/11
Sar Adc  Pipelined  Digital Calibration  Op-amp Sharing  
Inter-Stage Gain Error self-calibration of a 31.5fJ 10b 470MS/S pipelined-SAR ADC Conference paper
2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, JAPAN, NOV 12-14, 2012
Authors:  Jianyu Zhong;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite | View/Download：20/0 | TC[WOS]:5 TC[Scopus]:6 | Submit date：2019/02/11
A 50-fJ 10-b 160-MS/s pipelined-SAR ADC decoupled flip-around MDAC and self-embedded offset cancellation Journal article
IEEE Journal of Solid-State Circuits, 2012,Volume: 47,Issue: 11,Page: 2614-2626
Authors:  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite | View/Download：21/0 | TC[WOS]:21 TC[Scopus]:26 | Submit date：2018/10/30
Decoupled Flip-around Mdac  Offset-cancellation  Pipelined-sar Adc  Vdd -attenuator