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Accuracy-enhanced variance-based time-skew calibration using SAR as window detector Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019,Volume: 27,Issue: 2,Page: 481-485
Authors:  Liu J.;  Chan C.-H.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:10/0  |  Submit date:2019/02/13
Bandwidth mismatches  split-digital to analog converter (DAC)  successive-approximation-register (SAR) analog-to-digital converter (ADC)  time-interleaved (TI)  variance based  window detector (WD)  
27.3 A Piezoelectric Energy-Harvesting Interface Using Split Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy Extraction Improvement Conference paper
2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, USA, 17-21 Feb. 2019
Authors:  Zhiyuan Chen;  Yang Jiang;  Man-Kay Law;  Pui-In Mak;  Xiaoyang Zeng;  Rui P. Martins
Favorite  |  View/Download:31/0  |  Submit date:2019/03/13
Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019,Volume: 66,Issue: 1,Page: 82-93
Authors:  Li, Cheng;  Chan, Chi-Hang;  Zhu, Yan;  Martins, Rui P.
Favorite  |  View/Download:3/0  |  Submit date:2019/01/17
Reference error  reference buffer  successive-approximation-register (SAR)  analog-to-digital converter (ADC)  reference ripple  
Analysis of Reference Error in High-Speed SAR ADCs with Capacitive DAC Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 1,Page: 82-93
Authors:  Li C.;  Chan C.-H.;  Zhu Y.;  Martins R.P.
Favorite  |  View/Download:11/0  |  Submit date:2019/02/11
analog-to-digital converter (ADC)  reference buffer  Reference error  reference ripple  successive-approximation-register (SAR)  
An Integrated DC-DC Converter with Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery Conference paper
2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings
Authors:  Chio U.-F.;  Wen K.-C.;  Sin S.-W.;  Lam C.-S.;  Lu Y.;  Maloberti F.;  Martins R.P.
Favorite  |  View/Download:1/0  |  Submit date:2019/02/11
fully integrated  SC DC-DC converter  switched-capacitor  voltage-controlled oscillator (VCO)  
Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 12,Page: 3455-3469
Authors:  Jiang, Yang;  Law, Man-Kay;  Mak, Pui-In;  Martins, Rui P.
Favorite  |  View/Download:4/0  |  Submit date:2019/01/17
Algorithmic voltage-feed-in (AVFI) topology  buck-boost  dc-dc  linear topology  parasitic loss  power density  rational voltage conversion ratio  reconfigurable  reference-selective bootstrapping  switched capacitor  
A 220-MHz Bondwire-Based Fully-Integrated KY Converter With Fast Transient Response Under DCM Operation Conference paper
Authors:  Zeng, Wen-Liang;  Lam, Chi-Seng;  Sin, Sai-Weng;  Maloberti, Franco;  Wong, Man-Chung;  Martins, Rui Paulo
Favorite  |  View/Download:15/0  |  Submit date:2018/10/30
Fully integrated KY converter  boost converter  PWM  discontinuous conduction mode (DCM)  zero current detection (ZCD)  load transient response  voltage ripple  bondwire inductor  
A 220-MHz bondwire-based fully-integrated ky converter with fast transient response under DCM Operation Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 11,Page: 3984-3995
Authors:  Zeng W.-L.;  Lam C.-S.;  Sin S.-W.;  Maloberti F.;  Wong M.-C.;  Martins R.P.
Favorite  |  View/Download:4/0  |  Submit date:2018/12/23
Bondwire Inductor  Boost Converter  Discontinuous Conduction Mode (Dcm)  Fully Integrated Ky Converter  Load Transient Response  Pwm  Voltage Ripple  Zero Current Detection (Zcd)  
Analyses of static and dynamic reactive power allocation between synchronous compensators and shunt capacitors to counter commutation failures Journal article
INTERNATIONAL TRANSACTIONS ON ELECTRICAL ENERGY SYSTEMS, 2018,Volume: 28,Issue: 10
Authors:  Zhou, Yongzhi;  Wu, Hao;  Song, Yonghua;  Ling, Weijia;  Lou, Boliang;  Deng, Hui
Favorite  |  View/Download:34/0  |  Submit date:2018/10/30
commutation failures  polynomial approximation  synchronous compensator  transient voltage analyses  
A 36-Gb/s 1.3-mW/Gb/s duobinary-signal transmitter exploiting power-efficient cross-quadrature clocking multiplexers with maximized timing margin Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 9,Page: 3014-3026
Authors:  Chen Y.;  Mak P.-I.;  Boon C.C.;  Martins R.P.
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
Bandwidth (Bw)  Cmos  Cross-quadrature Clocking  D-type Flip-flop (Dff)  Data-dependent Jitter (Ddj)  Duobinary  Figure-of-merit (Fom)  Latch  Multi-level Signaling  Multiplexer (Mux)  Selector  Timing Margin