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Phase constant of SIW revisited with numerical SOC technique in FDTD algorithm Conference paper
IEEE International Symposium on Electromagnetic Compatibility, Beijing, China, 28-31 Oct. 2017
Authors:  Jiang H.;  Sun S.;  Zhu L.
Favorite  |  View/Download:5/0  |  Submit date:2019/02/12
Finite-difference Time-domain  Numerical De-embedding  Periodic Structure  Short-open Calibration  Substrate Integrated Waveguide  
Phase Constant of SIW Revisited with Numerical SOC Technique in FDTD Algorithm Conference paper
Authors:  Jiang, Hongfei;  Sun, Sheng;  Zhu, Lei;  IEEE
Favorite  |  View/Download:4/0  |  Submit date:2018/10/30
Finite-difference time-domain  numerical de-embedding  periodic structure  short-open calibration  substrate integrated waveguide  
A passive RFID tag embedded temperature sensor with improved process spreads immunity for a-30̂C to 60̂C sensing range Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2014,Volume: 61,Issue: 2,Page: 337
Authors:  Wang B.;  Law M.-K.;  Bermak A.;  Luong H.C.
Favorite  |  View/Download:16/0  |  Submit date:2018/10/30
Cmos Temperature Sensors  Passive Rfid Tags  Process Compensation  Time-domain Conversion (Tdc)  
Split-SAR ADCs: Improved linearity with power and speed optimization Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014,Volume: 22,Issue: 2,Page: 372-383
Authors:  Yan Zhu;  Chi-Hang Chan;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite  |  View/Download:9/0  |  Submit date:2018/10/30
Linearity Analysis  Linearity Calibration  Sar Adcs  Split Dac  Vcm-based Switching  
A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure Conference paper
2012 Symposium on VLSI Circuits (VLSIC), Honolulu, HI, USA, 13-15 June 2012
Authors:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
Inter-Stage Gain Error self-calibration of a 31.5fJ 10b 470MS/S pipelined-SAR ADC Conference paper
2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, JAPAN, NOV 12-14, 2012
Authors:  Jianyu Zhong;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite  |  View/Download:11/0  |  Submit date:2019/02/11
Parasitic calibration by two-step ratio approaching techinque for split capacitor array SAR ADCs Conference paper
2009 International SoC Design Conference, ISOCC 2009, Busan, South Korea, 22-24 Nov. 2009
Authors:  Wong S.-S.;  Zhu Y.;  Chan C.-H.;  Chio U.-F.;  Sin S.-W.;  U S.-P.;  Martins R.P.
Favorite  |  View/Download:13/0  |  Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Offset Calibration  Parasitic Calibration  Split Capacitor Array  Sucessive Approximation Register (Sar)