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A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Delta Sigma Modulator With Multirate Opamp Sharing Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 10,Page: 2641-2654
Authors:  Liang Qi;  Sai-Weng Sin;  Seng-Pan, U.;  Franco Maloberti;  Rui Paulo Martins
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Analog-to-digital Converter (Adc)  Discrete-time (Dt) Delta Sigma (Delta Sigma) Modulator  Multi-stage Noise Shaping (Mash)  Wideband  Power-efficient  Opamp Sharing  Multirate  Successive Approximation Register (Sar) Quantizer  
Design of an optimal preview controller for linear time-varying discrete systems in a multirate setting Journal article
International Journal of Wavelets, Multiresolution and Information Processing, 2015,Volume: 13,Issue: 6
Authors:  Fucheng Liao;  Yujian Guo;  Tang Y.Y.
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Discrete Lifting Technique  Optimal Control  Preview Control  Time-varying Discrete System  
Interactive IIR SC multirate compiler applied to multistage decimator design Journal article
Journal of Circuits, Systems and Computers, 2007,Volume: 16,Issue: 4,Page: 517-525
Authors:  PHILLIP N. CHEONG;  R. P. MARTINS
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Iir Filter  Multistage  Switched Capacitors  Decimator Design  Compiler  
Design of Very High-Frequency Multirate Switched-Capacitor Circuits – Extending the Boundaries Of CMOS Analog Front-End Filtering Book
US:Springer US, 2006
Authors:  U Seng Pan;  Martins Rui Paulo;  Epifanio da Franca Jose de Albuquerque
Favorite  |  View/Download:6/0  |  Submit date:2019/02/26
Cmos  Cmos Analog Integrated Circuit  Filter  Front-end Filtering  Gain & Offset Compensation  High-frequency  Multirate Signal Processing  Secs  Switched-capacitor  The Kluwer International Series In engIneerIng And Computer  Timing-mismatch And Jitter  Calculus  Consumption  Integrated Circuit  
GPS Aided IMU for Unmanned Air Vehicles Conference paper
Proc. of the 5th IFAC Symposium on Intelligent Autonomous Vehicles, Lisboa, Portugal, June 5 - 7, 2004
Authors:  J.F. Vasconcelos;  J. Calv´ario;  P. Oliveira;  C. Silvestre
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Navigation Systems  Strapdown Systems  Time-varying Systems  Complementary Filters,  
A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2004,Volume: 39,Issue: 1,Page: 87-99
Authors:  U S.-P.;  Martins R.P.;  Franca J.E.
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Autozeroing  Bandpass  Cmos Analog Integrated Circuits  Direct-digital Synthesis  Filters  Frequency-translated Filtering  Interpolation  Multirate Signal Processing  Sampled Data Circuits  Signal Sampling/reconstruction  Switched-capacitor Filters  
Mismatch-insensitive N-path multirate sigma-delta modulator for high-frequency applications Conference paper
Midwest Symposium on Circuits and Systems, TULSA, OK, AUG 04-07, 2002
Authors:  Lou F.;  U S.-P.;  Martins R.P.
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N-path multirate sigma-delta modulator for high-frequency applications Conference paper
Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, Dubrovnik, Croatia, Croatia, 15-18 Sept. 2002
Authors:  Lou F.;  Seng-Pan U.;  Martins R.P.
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Design and analysis of low timing-skew clock generation for time-interleaved sampled-data systems Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, PHOENIX, AZ, MAY 26-29, 2002
Authors:  U S.-P.;  Martins R.P.;  Franca J.E.
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High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering Conference paper
ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings, Sydney, NSW, Australia, 6-9 May 2001
Authors:  Seng-Pan U.;  Martins R.P.;  Franca J.E.
Favorite  |  View/Download:4/0  |  Submit date:2019/02/11