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A high resolution multi-bit incremental converter insensitive to DAC mismatch error Conference paper
2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Lisbon, Portugal, JUN 27-30, 2016
Authors:  Biao Wang;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
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High Resolution  Incremental Converter  Multi-bit Quantizer  Insensitive To Dac Mismatch  
A 22.4 μw 80dB SNDR ΣΔ modulator with passive analog adder and SAR quantizer for EMG application Conference paper
2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, JAPAN, NOV 12-14, 2012
Authors:  Zhijie Chen;  Yang Jiang;  Chenyan Cai;  He-Gong Wei;  Sai-Weng Sin;  Seng-Pan U;  Zhihua Wang;  Rui Paulo Martins
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Σδ Modulator  Sar Quantizer  Passive Analog Adder  
A dual-mode low-distortion sigma-delta modulator with relaxing comparator accuracy Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Kos, GREECE, MAY 21-24, 2006
Authors:  Chio K.-S.;  Seng-Pan U.;  Martins R.P.
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