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A 7.8-mW 5-b 5-GS/s Dual-Edges-Triggered Time-Based Flash ADC Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 8,Page: 1966-1976
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Sin, Sai-Weng;  Seng-Pan, U.;  Martins, Rui P.;  Maloberti, Franco
Favorite  |  View/Download:22/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Flash  Time-based Dual-edge-triggered  
A 4x time-domain interpolation 6-bit 3.4 Gs/s 12.6 mw flash ADC in 65 nm CMOS Journal article
Journal of Semiconductor Technology and Science, 2016,Volume: 16,Issue: 4,Page: 395-404
Authors:  Jianwei Liu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
4x Time-domain Interpolation  Flash Adc  Sr-latch  Time Comparator  
An 8-bit 0.7-GS/s single channel flash-SAR ADC in 65-nm CMOS technology Conference paper
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, 12-15 Sept. 2016
Authors:  Dante Gabriel Muratore;  Alper Akdikmen;  Edoardo Bonizzoni;  Franco Maloberti;  U-Fat Chio;  Sai-Weng Sin;  Rui Paulo Martins
Favorite  |  View/Download:5/0  |  Submit date:2019/02/11
Comparator with built-in reference voltage generation and split-ROM encoder for a high-speed flash ADC Conference paper
ISSCS 2015 - International Symposium on Signals, Circuits and Systems, Iasi, ROMANIA, JUL 09-10, 2015
Authors:  Chen Y.;  Mak P.-I.;  Yang J.;  Yue R.;  Wang Y.
Favorite  |  View/Download:5/0  |  Submit date:2019/02/12
A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolation Conference paper
2015 IEEE Asian Solid-State Circuits Conference (A-SSCC), Xiamen Int C Ctr (XICC), Xiamen, PEOPLES R CHINA, 9-11 Nov. 2015
Authors:  Jianwei Liu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:5/0  |  Submit date:2019/02/11
Cascade Analog to Digital Converting System Patent
专利类型: 发明专利, 专利号: US8466823B2, 申请日期: 2011-08-05, 公开日期: 2013-06-18
Authors:  U-Fat CHIO;  He-Gong Wei;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo da Silva Martins;  Franco Maloberti
Favorite  |  View/Download:7/0  |  Submit date:2019/03/06
A 5-bit 1.25-GS/s 4x-capacitive-folding flash ADC in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2013,Volume: 48,Issue: 9,Page: 2154-2169
Authors:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite  |  View/Download:8/0  |  Submit date:2018/10/30
Analog-to-digital Conversion (Adc)  Calibration  Embedded Reference  Flash Adc  Folding  Low Power  
A 3.65 mW 5 bit 2GS/s flash ADC with built-in reference voltage in 65nm CMOS process Conference paper
ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
Authors:  Yang J.;  Chen Y.;  Qian H.;  Wang Y.;  Yue R.
Favorite  |  View/Download:3/0  |  Submit date:2019/02/14
A 1.5GS/s 6bit 2bit/Step asynchronous time interleaved SAR ADC in 65nm CMOS Conference paper
ECS Transactions
Authors:  Wang Z.;  Chen Y.;  Qian H.
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A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators Conference paper
2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011, Jeju, South Korea, 14-16 Nov. 2011
Authors:  Wong S.-S.;  Chio U.-F.;  Chan C.-H.;  Choi H.-L.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:4/0  |  Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Asynchronous Binary-search Adc  Flash Adc  Sar Adc