UM

Browse/Search Results:  1-2 of 2 Help

Selected(0)Clear Items/Page:    Sort:
A 36-Gb/s 1.3-mW/Gb/s duobinary-signal transmitter exploiting power-efficient cross-quadrature clocking multiplexers with maximized timing margin Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 9,Page: 3014-3026
Authors:  Chen Y.;  Mak P.-I.;  Boon C.C.;  Martins R.P.
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
Bandwidth (Bw)  Cmos  Cross-quadrature Clocking  D-type Flip-flop (Dff)  Data-dependent Jitter (Ddj)  Duobinary  Figure-of-merit (Fom)  Latch  Multi-level Signaling  Multiplexer (Mux)  Selector  Timing Margin  
A 27-Gb/s Time-Interleaved Duobinary Transmitter Achieving 1.44-mW/Gb/s FOM in 65-nm CMOS Journal article
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2017,Volume: 27,Issue: 9,Page: 839-841
Authors:  Chen, Yong;  Mak, Pui-In;  Boon, Chirn Chye;  Martins, Rui P.
Favorite  |  View/Download:10/0  |  Submit date:2018/10/30
Cmos  Duobinary  Figure-of-merit (Fom)  Flip-flop (Ff)  Latch  Multiplexer (Mux)  Selector  Time-interleaved