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A 550μW 20kHz BW 100.8DB SNDR Linear-Exponential Multi-Bit Incremental Converter with 256-cycles in 65NM CMOS Conference paper
IEEE Symposium on VLSI Circuits, Digest of Technical Papers
作者:  Wang B.;  Sin S.-W.;  Seng-Pan U.;  Malobertr F.;  Martins R.P.
收藏  |  浏览/下载:6/0  |  提交时间:2019/02/11
A 36-Gb/s 1.3-mW/Gb/s duobinary-signal transmitter exploiting power-efficient cross-quadrature clocking multiplexers with maximized timing margin Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 9,Page: 3014-3026
作者:  Chen Y.;  Mak P.-I.;  Boon C.C.;  Martins R.P.
收藏  |  浏览/下载:6/0  |  提交时间:2019/02/11
Bandwidth (Bw)  Cmos  Cross-quadrature Clocking  D-type Flip-flop (Dff)  Data-dependent Jitter (Ddj)  Duobinary  Figure-of-merit (Fom)  Latch  Multi-level Signaling  Multiplexer (Mux)  Selector  Timing Margin  
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Delta Sigma Modulator With Multirate Opamp Sharing Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 10,Page: 2641-2654
作者:  Liang Qi;  Sai-Weng Sin;  Seng-Pan, U.;  Franco Maloberti;  Rui Paulo Martins
收藏  |  浏览/下载:14/0  |  提交时间:2018/10/30
Analog-to-digital Converter (Adc)  Discrete-time (Dt) Delta Sigma (Delta Sigma) Modulator  Multi-stage Noise Shaping (Mash)  Wideband  Power-efficient  Opamp Sharing  Multirate  Successive Approximation Register (Sar) Quantizer  
A 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) P-out Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017,Volume: 52,Issue: 6,Page: 1495-1508
作者:  Peng, Xingqiang;  Yin, Jun;  Mak, Pui-In;  Yu, Wei-Han;  Martins, Rui P.
收藏  |  浏览/下载:11/0  |  提交时间:2018/10/30
Back-off power efficiency  class-F  CMOS  digital-controlled oscillator (DCO)  matching network (MN)  output power  power amplifier (PA)  transformer  transmitter (TX)  ultralow-power (ULP)  ZigBee  
A 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) Pout Journal article
IEEE Journal of Solid-State Circuits, 2017,Volume: 52,Issue: 6,Page: 1495-1508
作者:  Xingqiang Peng;  Jun Yin;  Pui-In Mak;  Wei-Han Yu;  Rui P. Martins
收藏  |  浏览/下载:7/0  |  提交时间:2019/02/11
Back-off Power Efficiency  Class-f  Cmos  Digital-controlled Oscillator (Dco)  Matching Network (Mn)  Output Power  Power Amplifier (Pa)  Transformer  Transmitter (Tx)  Ultralow-power (Ulp)  Zigbee  
Automated Test System with Input Parameters Sweep-Function for Analog-to-Digital Converters Conference paper
作者:  Qin, WeiWei;  Sin, Sai-Weng;  Seng-Pan, U.;  Martins, Rui Paulo;  Wang, ZH;  Xie, WH
收藏  |  浏览/下载:3/0  |  提交时间:2018/10/30
Analog to Digital Converter  Test System  Automated  Sweep Function  LabVIEW  
A 1.1 μW CMOS smart temperature sensor with an inaccuracy of ±0.2 °C (3σ) for clinical temperature monitoring Journal article
IEEE Sensors Journal, 2016,Volume: 16,Issue: 8,Page: 2272-2281
作者:  Man-Kay Law;  Sanfeng Lu;  Tao Wu;  Amine Bermak;  Pui-In Mak;  Rui P. Martins
收藏  |  浏览/下载:9/0  |  提交时间:2019/02/11
Smart Temperature Sensor  Ultra-low Power  High Accuracy  Incremental Analog-to-digital Converter (I-adc),  Multi-ratio Pre-gain  Block-based Data Weighted Averaging (Bdwa)  
A Highly-scalable analog equalizer using a tunable and current-reusable for 10-Gb/s I/O Links Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015,Volume: 23,Issue: 5,Page: 978-982
作者:  Chen Y.;  Mak P.-I.;  Wang Y.
收藏  |  浏览/下载:3/0  |  提交时间:2019/02/12
Active Inductor  Analog Equalizer  Cmos  Eye-opening Rate  Jitter  Negative Miller Capacitor  Positive-feedback.  
A 12 pJ/Pixel analog-to-information converter based 816 × 640 pixel CMOS image sensor Journal article
IEEE Journal of Solid-State Circuits, 2014,Volume: 49,Issue: 5,Page: 1210-1222
作者:  Chen D.G.;  Tang F.;  Law M.-K.;  Bermak A.
收藏  |  浏览/下载:3/0  |  提交时间:2019/02/14
Analog-to-information Converter (Aic)  Charge Transfer Amplifier  Cmos Image Sensor  Compressive Sensing  Image Compression  Sar Adc  
Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulators Conference paper
2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, AUSTRALIA, JUN 01-05, 2014
作者:  Da Feng;  Franco Maloberti;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
收藏  |  浏览/下载:6/0  |  提交时间:2019/02/11