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A 0.0056-mm2 -249-dB-FoM All-Digital MDLL using a block-sharing offset-free frequency-tracking loop and dual multiplexed-ring VCOs Journal article
IEEE Journal of Solid-State Circuits, 2019,Volume: 54,Issue: 1,Page: 88-98
Authors:  Yang S.;  Yin J.;  Mak P.-I.;  Martins R.P.
Favorite | View/Download:28/0 | TC[WOS]:3 TC[Scopus]:0 | Submit date:2019/02/11
Clock Multiplier  Digital-controlled Delay Line (Dcdl)  Frequency-tracking Loop (Ftl)  Injection-locked Phase-locked Loop (Il-pll)  Multiplying Delay-locked Loop (Mdll)  Phase Noise  Ring Voltage-controlled Oscillator (Rvco)  Root-mean-square (Rms) Jitter  
Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC Conference paper
Authors:  Wang, Guancheng;  Li, Cheng;  Zhu, Yan;  Zhong, Jianyu;  Lu, Yan;  Chan, Chi-Hang;  Martins, Rui P.
Favorite | View/Download:43/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2018/10/30
Gain error calibration  testing signal generation  SAR ADC  bridge DAC  low-dropout (LDO) regulator  
Missing-Code-occurrence probability calibration technique for DAC nonlinearity with supply and reference circuit analysis in a SAR ADC Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 11,Page: 3707-3719
Authors:  Wang G.;  Li C.;  Zhu Y.;  Zhong J.;  Lu Y.;  Chan C.-H.;  Martins R.P.
Favorite | View/Download:12/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/11
bridge DAC  Gain error calibration  low-dropout (LDO) regulator  SAR ADC  testing signal generation  
Optimal LSBs-based quantum watermarking with lower distortion Journal article
International Journal of Quantum Information, 2018,Volume: 16,Issue: 7
Authors:  Zhou R.-G.;  Hu W.W.;  Luo G.F.;  Fan P.;  Ian H.
Favorite | View/Download:4/0 | TC[WOS]:3 TC[Scopus]:0 | Submit date:2019/04/08
computational complexity  LSBs steganography  optimal LSBs based  Quantum watermarking  visual effect  
A 0.4 v 6.4 μw 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °c for Wearable and Sensing Applications Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems
Authors:  Lei K.-M.;  Mak P.-I.;  Martins R.P.
Favorite | View/Download:22/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/11
bootstrap  bulk-driven amplifier  CMOS  relaxation oscillator (RxO)  ultra-low-voltage (ULV)  wearable devices  
Passive Noise Shaping in SAR ADC With Improved Efficiency Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018,Volume: 26,Issue: 2,Page: 416-420
Authors:  Song, Yan;  Chan, Chi-Hang;  Zhu, Yan;  Geng, Li;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite | View/Download:34/0 | TC[WOS]:3 TC[Scopus]:0 | Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Delta Sampling  Oversampling  Passive Noise Shaping (Pns)  Successive Approximation Register (Sar)  
Circuit Design of CMOS Rectifiers Journal article
CMOS INTEGRATED CIRCUIT DESIGN FOR WIRELESS POWER TRANSFER, 2018,Page: 53-96
Authors:  Lu, Yan;  Ki, Wing-Hung;  Lu, Y;  Ki, WH
Favorite | View/Download:18/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2018/10/30
Wireless power transfer  AC-DC conversion  Rectifier  Comparator  Delay  RF-DC  Energy harvesting  
A 5-bit 2 GS/s binary-search ADC with charge-steering comparators Conference paper
2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), Seoul, SOUTH KOREA, NOV 06-08, 2017
Authors:  Chio, U-Fat;  Sin S.-W.;  Seng-Pan U.;  Maloberti F.;  Martins R.P.
Favorite | View/Download:20/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/11
Binary-search Adc  Asynchronous  Charge-steering  
Fully Integrated Inductor-Less Flipping-Capacitor Rectifier for Piezoelectric Energy Harvesting Journal article
IEEE Journal of Solid-State Circuits, 2017,Volume: 52,Issue: 12,Page: 3168-3180
Authors:  Zhiyuan Chen;  Man-Kay Law;  Pui-In Mak;  Wing-Hung Ki;  Rui P. Martins
Favorite | View/Download:19/0 | TC[WOS]:14 TC[Scopus]:0 | Submit date:2019/02/11
Cmos  Deep-tissue Implant  Flipping-capacitor Rectifier (Fcr)  Fully Integrated  High Efficiency  Inductor-less  Parallel-synchronized-switch Harvesting-on-inductor (P-sshi)  Piezoelectric Energy Harvesting  Reconfigurable Capacitor Array  Ultrasound  
60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017,Volume: 52,Issue: 10,Page: 2576-2588
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Li, Cheng;  Zhang, Wai-Hong;  Ho, Iok-Meng;  Wei, Lai;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite | View/Download:31/0 | TC[WOS]:12 TC[Scopus]:0 | Submit date:2018/10/30
Reference Buffer  Reference Error Calibration  Successive Approximation Register (Sar) Analog-to-digital Converter (Adc)  Threshold Reconfigurable Comparator