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Linear Regulators for WPT Journal article
CMOS INTEGRATED CIRCUIT DESIGN FOR WIRELESS POWER TRANSFER, 2018,Page: 97-126
Authors:  Lu, Yan;  Ki, Wing-Hung;  Lu, Y;  Ki, WH
Favorite  |  View/Download:10/0  |  Submit date:2018/10/30
Wireless power transfer  Low-dropout regulator  Power supply rejection  PSRR  Digital LDO  Transient response  
CMOS Integrated Circuit Design for Wireless Power Transfer Book
Singapore:Springer, Singapore, 2018
Authors:  Lu, Yan;  Ki, Wing-Hung
Favorite  |  View/Download:1/0  |  Submit date:2019/04/03
Wireless Power Transfer (Wpt)  Dc-dc  Linear Regulator  Low Dropout Regulator (Ldo)  Power Amplifier  Cmos Integrated Circuit  Analog Integrated Circuit  Power Management Integrated Circuit  Power Converter  Rectifier  Ac-dc  Voltage Regulator  
A 94-dB DR,105-Hz bandwidth interface circuit for inertial navigation applications Conference paper
2016 International Symposium on Integrated Circuits, ISIC 2016, Singapore, Singapore, 12-14 Dec. 2016
Authors:  Wei Li;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:2/0  |  Submit date:2019/02/11
Selected Topics in Power, RF, and Mixed-Signal ICs Book
Gistrup, Denmark:River Publishers, 2017
Authors:  Yan Lu;  Chi-Seng Lam
Favorite  |  View/Download:3/0  |  Submit date:2019/04/03
Dc-dc Switching Converters  Iot Applications  Analog And Digital Regulators  Analog And Digital Frequency Synthesizers  Hybrid Adc Architecture  Cmos Image Sensors  Cmos Temperature Sensors  Cmos Millimeter-wave Power Amplifiers  Zigbee  Ble Transmitter  
Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters Journal article
Analog Integrated Circuits and Signal Processing, 2013,Volume: 76,Issue: 1,Page: 35-46
Authors:  Chen-Yan Cai;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
Ct Δς Modulator  Excess-loop-delay Compensation Techniques For Hybrid Active-passive Loop-filter  Excess-loop-delay For Hybrid Active-passive Loop-filter  Hybrid Active-passive Loop-filter  
A 12-bit 110MS/s 4-stage single-opamp pipelined SAR ADC with ratio-based GEC technique Conference paper
2012 Proceedings of the ESSCIRC (ESSCIRC), Bordeaux, France, 17-21 Sept. 2012
Authors:  Rui Wang;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Zhihua Wang;  Rui Paulo Martins
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
Sar Adc  Pipelined  Digital Calibration  Op-amp Sharing  
Analog-Baseband Architectures and Circuits – for Multistandard and Low-Voltage Wireless Transceivers Book
US:Springer Netherlands, 2007
Authors:  Pui-In Mak;  Ben U Seng Pan;  Rui Paulo Martins
Favorite  |  View/Download:1/0  |  Submit date:2019/03/11
Analog Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless Transceivers Book
Dordrecht:Springer, 2007
Authors:  Pui-In Mak;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:1/0  |  Submit date:2019/02/27
Cmos  Integrated Circuit  Multistandard  Cmos Analog Integrated Circuits  Filter  Low Voltage  Wireless Transceiver  
Design of Very High-Frequency Multirate Switched-Capacitor Circuits – Extending the Boundaries Of CMOS Analog Front-End Filtering Book
US:Springer US, 2006
Authors:  U Seng Pan;  Martins Rui Paulo;  Epifanio da Franca Jose de Albuquerque
Favorite  |  View/Download:6/0  |  Submit date:2019/02/26
Cmos  Cmos Analog Integrated Circuit  Filter  Front-end Filtering  Gain & Offset Compensation  High-frequency  Multirate Signal Processing  Secs  Switched-capacitor  The Kluwer International Series In engIneerIng And Computer  Timing-mismatch And Jitter  Calculus  Consumption  Integrated Circuit