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Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC Conference paper
Authors:  Wang, Guancheng;  Li, Cheng;  Zhu, Yan;  Zhong, Jianyu;  Lu, Yan;  Chan, Chi-Hang;  Martins, Rui P.
Favorite  |  View/Download:17/0  |  Submit date:2018/10/30
Gain error calibration  testing signal generation  SAR ADC  bridge DAC  low-dropout (LDO) regulator  
Missing-Code-occurrence probability calibration technique for DAC nonlinearity with supply and reference circuit analysis in a SAR ADC Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 11,Page: 3707-3719
Authors:  Wang G.;  Li C.;  Zhu Y.;  Zhong J.;  Lu Y.;  Chan C.-H.;  Martins R.P.
Favorite  |  View/Download:3/0  |  Submit date:2019/02/11
bridge DAC  Gain error calibration  low-dropout (LDO) regulator  SAR ADC  testing signal generation  
A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current Conference paper
Authors:  Mao, Jiaji;  Guo, Mingqiang;  Sin, Sai-Weng;  Martins, Rui Paulo
Favorite  |  View/Download:12/0  |  Submit date:2018/10/30
Analog-to-digital conversion  digital background calibration  pipelined ADC  split ADC  opamp-sharing technique  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Conference paper
Authors:  Wang, Wei;  Zhu, Yan;  Chan, Chi-Hang;  Martins, Rui Paulo
Favorite  |  View/Download:14/0  |  Submit date:2018/10/30
Terms-Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 14-Bit Split-Pipeline ADC with Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2018,Volume: 65,Issue: 10,Page: 1380-1384
Authors:  Mao J.;  Guo M.;  Sin S.-W.;  Martins R.P.
Favorite  |  View/Download:3/0  |  Submit date:2019/02/11
Analog-to-digital conversion  digital background calibration  opamp-sharing technique  pipelined ADC  split ADC  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang W.;  Zhu Y.;  Chan C.-H.;  Martins R.P.
Favorite  |  View/Download:4/0  |  Submit date:2019/02/11
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang,Wei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite  |  View/Download:3/0  |  Submit date:2019/08/22
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 4.06 mW 10-bit 150 MS/s SAR ADC With 1.5-bit/cycle Operation for Medical Imaging Applications Journal article
IEEE SENSORS JOURNAL, 2018,Volume: 18,Issue: 11,Page: 4553-4560
Authors:  Sunny, Sharma;  Chen, Yong;  Boon, Chirn Chye
Favorite  |  View/Download:6/0  |  Submit date:2018/10/30
1.5-bit/cycle  ADC  capacitive digital-to-analog converter (CDAC)  CMOS  error correction  low power  medical imaging  redundancy  SAR  successive approximation register  
A 4.06 mW 10-bit 150 MS/s SAR ADC with 1.5-bit/cycle Operation for Medical Imaging Applications Journal article
IEEE Sensors Journal, 2018,Volume: 18,Issue: 11,Page: 4553-4560
Authors:  Sunny S.;  Chen Y.;  Boon C.C.
Favorite  |  View/Download:1/0  |  Submit date:2019/02/14
1.5-bit/cycle  ADC  capacitive digital-to-analog converter (CDAC)  CMOS  error correction  low power  medical imaging  redundancy  SAR  successive approximation register  
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 3,Page: 850-860
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Zhang, Wai-Hong;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:17/0  |  Submit date:2018/10/30
1-then-2 B/cycle Sar Adc  Analog-to-digital Conversion  Background Offset Calibration  Multi-bit/cycle Sar Adc  Time Interleaving