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Digital 2-/3-Phase Switched-Capacitor Converter with Ripple Reduction and Efficiency Improvement Journal article
IEEE Journal of Solid-State Circuits, 2017,Volume: 52,Issue: 7,Page: 1836-1848
Authors:  Jiang J.;  Ki W.-H.;  Lu Y.
Favorite  |  View/Download:8/0  |  Submit date:2019/02/14
2-/3-phase  3-phase  Adaptive Ripple Reduction  Dc-dc Converter  Digitally Controlled  Efficiency Improvements  Sc Converter  Switched-capacitor (Sc)  Voltage Conversion Ratio  Voltage Regulator  
An output-capacitor-free analog-assisted digital low-dropout regulator with tri-loop control Conference paper
2017 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, 5-9 Feb. 2017
Authors:  Mo Huang;  Yan Lu;  Seng-Pan U;  Rui P. Martins
Favorite  |  View/Download:19/0  |  Submit date:2018/11/06
A digitally-controlled 2-/3-phase 6-ratio switched- capacitor DC-DC converter with adaptive ripple reduction and efficiency improvements Conference paper
European Solid-State Circuits Conference, Lausanne, SWITZERLAND, SEP 12-15, 2016
Authors:  Jiang J.;  Lu Y.;  Ki W.-H.
Favorite  |  View/Download:6/0  |  Submit date:2019/02/14
Limit Cycle Oscillation Reduction for Digital Low Dropout Regulators Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2016,Volume: 63,Issue: 9,Page: 903-907
Authors:  Huang M.;  Lu Y.;  Sin S.-W.;  Seng P.;  Martins R.P.;  Ki W.-H.
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
Compensation Zero  Describing Function  Digital Control  Feedforward Path  Limit Cycle Oscillation (Lco)  Low Dropout Regulator (Ldo)  Sampled Nonlinear System  
A CMOS Delta-Sigma PLL Transmitter with Efficient Modulation Bandwidth Calibration Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2015,Volume: 62,Issue: 7,Page: 1716-1725
Authors:  Huang M.;  Chen D.;  Guo J.;  Ye H.;  Xu K.;  Liang X.;  Lu Y.
Favorite  |  View/Download:14/0  |  Submit date:2019/02/14
Delta-sigma Phase Locked Loop (Pll)  Modulation Bandwidth Calibration  Transmitters