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Research Outputs

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  Total Views
 58

  Access Source
    internal: 1
    External: 57
    Domestic: 20
    Abroad: 38

  Annual Views
 58

  Access Source
    internal: 1
    External: 57
    Domestic: 20
    Abroad: 38

  Monthly Views
 1

  Access Source
    internal: 0
    External: 1
    Domestic: 1
    Abroad: 0

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Visits

1. A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS [33]
2. A 7.8-mW 5-b 5-GS/s Dual-Edges-Triggered Time-Based Flash ADC [21]
3. A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With B.. [17]
4. Passive Noise Shaping in SAR ADC With Improved Efficiency [17]
5. A 77dB SNDR 12.5MHz Bandwidth 0-1 MASH ΣΔ ADC Based on the Pipel.. [16]
6. 60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Referen.. [14]
7. Metastablility in SAR ADCs [14]
8. Active-Passive Delta Sigma Modulator for High-Resolution and Low-P.. [14]
9. A 10-bit 500-MS/s Partial-Interleaving Pipelined SAR ADC With Offs.. [13]
10. Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC with Partial .. [13]
11. A 5.35 mW 10 MHz bandwidth CT third-order ΔΣ modulator with sing.. [12]
12. A 12b 180MS/s 0.068mm2 pipelined-SAR ADC with merged-residue DAC f.. [12]
13. A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with background offset ca.. [11]
14. Parasitic calibration by two-step ratio approaching techinque for .. [11]
15. Uniform Quantization Theory-Based Linearity Calibration for Split .. [11]
16. A 50-fJ 10-b 160-MS/s pipelined-SAR ADC decoupled flip-around MDAC.. [10]
17. A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC [10]
18. A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 6.. [10]
19. A voltage feedback charge compensation technique for split DAC arc.. [10]
20. An 8-b 400-ms/s 2-b-per-cycle sar adc with resistive dac [9]
21. A 5.5mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOS [9]
22. A 35 fJ 10b 160 MS/s pipelined-SAR ADC with decoupled flip-around .. [9]
23. Parasitics nonlinearity cancellation technique for split DAC archi.. [9]
24. Analysis of common-mode interference and jitter of clock receiver .. [8]
25. A 12b 180MS/s 0.068mm2 with Full-Calibration-Integrated Pipelined-.. [8]
26. A 4x time-domain interpolation 6-bit 3.4 Gs/s 12.6 mw flash ADC in.. [8]
27. A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC [8]
28. An 11b 900 MS/s time-interleaved sub-ranging pipelined-SAR ADC [8]
29. A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switc.. [8]
30. A reconfigurable low-noise dynamic comparator with offset calibrat.. [8]
31. Split-SAR ADCs: Improved linearity with power and speed optimizati.. [7]
32. A 5-bit 1.25-GS/s 4x-capacitive-folding flash ADC in 65-nm CMOS [7]
33. A missing-code-detection gain error calibration achieving 63dB SNR.. [7]
34. A 0.011mm2 60dB SNDR 100MS/s reference error calibrated SAR ADC wi.. [7]
35. An 11b 450 MS/s Three-Way Time-Interleaved Subranging Pipelined-SA.. [7]
36. A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC st.. [7]
37. An 11b 60MS/s 2.1mW two-step time-interleaved SAR-ADC with reused .. [7]
38. A power effective 5-bit 600 MS/s binary-search ADC with simplified.. [7]
39. A threshold-embedded offset calibration technique for inverter-bas.. [7]
40. A voltage-controlled capacitance offset calibration technique for .. [7]
41. Histogram-based ratio mismatch calibration for bridge-DAC in 12-bi.. [6]
42. A 7-bit 300-MS/s subranging ADC with embedded threshold & gain-los.. [6]
43. Comparator-based successive folding ADC [6]
44. A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolati.. [5]
45. A 10.4-ENOB 120MS/s SAR ADC with DAC linearity calibration in 90nm.. [5]
46. A time-efficient dither-injection scheme for pipelined SAR ADC [5]
47. Time-Inteleaved Piplined-SAR Analog to Digital Converter with Low .. [5]
48. Analog to Digital Converter Circuit [5]
49. N-Bits Successive Approximation Register Analog-to-Digital Convert.. [5]
50. Analog to digital converter circuit [5]
51. A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized numb.. [4]
52. Analog to digital converter circuit [4]
53. N-bits successive approximation register analog-to-digital convert.. [3]
54. Analog to digital converter circuit [3]
55. Sampling front-end for analog to digital converter [3]
56. N-Bits Successive Approximation Register Analog-to-Digital Convert.. [2]
57. Comparator and Calibration Thereof [1]

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