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FPGA-based decoupled double synchronous reference frame PLL for active power filters
Bo Sun1,2; Ning-Yi Dai1,2; U-Fat Chio1; Man-Chung Wong1,2; Chi-Kong Wong1,2; Sai-Weng Sin1; Seng-Pan U1; R. P. Martins1,3
2011-09-05
Conference Name6th IEEE Conference on Industrial Electronics and Applications (ICIEA)
Source PublicationProceedings of the 2011 6th IEEE Conference on Industrial Electronics and Applications, ICIEA 2011
Pages2145-2150
Conference Date21-23 June 2011
Conference PlaceBeijing
CountryChina
Author of SourceIEEE
Publication Place345 E 47TH ST, NEW YORK, NY 10017 USA
PublisherIEEE
Abstract

Decoupled double synchronous reference frame Phase-locked loop (DDSRF-PLL) is able to detect the phase angle of positive sequence when the three-phase voltages are unbalanced and distorted. In this paper, it is applied to the compensation current detection algorithm of shunt active power filter (SAPF) to replace a conventional PLL. Simulation results indicate that the compensation performance could be improved under voltage unbalance and distortion. Besides, DDSRF-PLL implemented on one field-programmable gate array (FPGA) chip is proposed. When compared with widely used digital signal processors (DSPs) in power control, FPGA the proposed structure has the advantages of parallel processing and rich user-defined I/O ports so that it exhibits processing efficiency and flexibility in application. 

KeywordDecoupled Double Synchronous Reference Frame Phase-locked Loop (Ddsrf-pll) Field-programmable Gate Array (Fpga) Shunt Active Power Filter (Sapf)
DOIhttps://doi.org/10.1109/ICIEA.2011.5975946
URLView the original
Indexed BySCI
Language英语
WOS Research AreaEngineering
WOS SubjectEngineering, Industrial ; Engineering, Electrical & Electronic
WOS IDWOS:000296062500406
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Cited Times [WOS]:7   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Faculty of Science and Technology
Affiliation1.State Key Laboratory of Analog and Mixed Signal VLSI University of Macau Macao, China
2.Power Electronics Laboratory
3.Instituto Superior Técnico/TU of Lisbon, Portugal
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Bo Sun,Ning-Yi Dai,U-Fat Chio,et al. FPGA-based decoupled double synchronous reference frame PLL for active power filters[C]//IEEE. 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE,2011:2145-2150.
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