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A 0.003mm2 1.7-to-3.5GHz dual-mode time-interleaved ring-VCO achieving 90-to-150kHz 1/f3 phase-noise corner
Jun Yin1; Pui-In Mak1; Franco Maloberti2; Rui P. Martins1,3
2017-07-08
Conference Name63rd IEEE International Solid-State Circuits Conference, ISSCC 2016
Source Publication2016 IEEE International Solid-State Circuits Conference (ISSCC)
Pages48-49
Conference Date1 31, 2016 - 2 4, 2016
Conference PlaceSan Francisco, CA, United states
Author of SourceInstitute of Electrical and Electronics Engineers Inc.
Abstract

Ring-VCOs (RVCOs) [1] have been avoided for over a decade for high-performance RF systems due to their much lower FOM (<;165dB [2]) than that of their LC counterparts from low to high frequency offsets. Yet, as the cost of ultra-scaled CMOS technologies is escalating, the small-die-area and wide-tuning-range advantages of RVCOs have attracted more attention recently, aiming to break the FOM limit at the system level. In [2], a type-I PLL succeeds in suppressing the RVCO phase noise (PN) by extending the loop bandwidth to 10MHz (f ref /20 → f ref /2), facilitating an ultra-compact (0.015mm 2 ) frequency synthesizer for 2.4GHz WLAN. However, the type-I PLL only offers 20dB/dec phase-noise suppression for its RVCO. Thus, despite using large transistors (36/0.28μm), the 1/f 3 PN corner (f 1 /f 3 ) is still high (~4MHz), degrading the overall jitter performance of the PLL. This paper proposes a dual-mode time-interleaved RVCO (TI-RVCO). It offers interesting properties of extending the frequency tuning range and reducing f1/f3 corner (~1MHz → ~100kHz), resulting in a better FOM over a wide range of frequency offsets (10kHz to 1MHz). The achieved f 1 /f 3 noise corner (~90kHz to 150kHz) is comparable to the state-of-the-art LC-VCOs [3, 4].

DOIhttp://doi.org/10.1109/ISSCC.2016.7417900
Indexed BySCI
Language英语
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000382151400011
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Citation statistics
Cited Times [WOS]:2   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionINSTITUTE OF MICROELECTRONICS
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation1.University of Macau, China;
2.University of Pavia, Pavia, Italy;
3.Instituto Superior Tecnico, Lisbon, Portugal
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Jun Yin,Pui-In Mak,Franco Maloberti,et al. A 0.003mm2 1.7-to-3.5GHz dual-mode time-interleaved ring-VCO achieving 90-to-150kHz 1/f3 phase-noise corner[C]//Institute of Electrical and Electronics Engineers Inc.,2017:48-49.
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