UM  > 微電子研究院
A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS
Jiang, Junmin1,2; Lu, Yan1; Ki, Wing-Hung2; Seng-Pan, U.1,3; Martins, Rui P.1,4
2017-03-02
Conference Name64th IEEE International Solid-State Circuits Conference, ISSCC 2017
Source Publication2017 IEEE International Solid-State Circuits Conference (ISSCC)
Volume60
Pages344-345
Conference Date5-9 Feb. 2017
Conference PlaceSan Francisco, CA, United states
Author of SourceInstitute of Electrical and Electronics Engineers Inc.
Other Abstract

Multicore application processors in smartphones/watches use power-saving techniques such as dynamic voltage and frequency scaling (DVFS) to extend battery cycle, and supply cores with different voltages [1]. High-efficiency fully integrated switched-capacitor (SC) power converters with no external components are promising candidates [2]. Typically, SC converters with different specifications are independently designed (Fig. 20.5.1), leading to a large area overhead, as each converter has to handle its peak output power. Recently, multi-output SC converters are reported to tackle this issue. In [3], an on-demand strategy is used to control two outputs, each with a different loading range, and the outputs are not interchangeable. In [4], the two output voltages are fixed with voltage conversion ratios (VCRs) of 2× and 3× only. In [5], the controller is integrated, but the three output voltages are still from three individual SC converters. Without reallocating the capacitors in the power stages, capacitor utilization is low, as margins have to be reserved to cater for each converter’s peak output power. This paper presents a fully integrated dual-output SC converter with dynamic powercell allocation for application processors. The power cells are shared and can be dynamically allocated according to load demands. A dual-path VCO that works independently of power-cell allocation is proposed to realize a fast and stable regulation loop. The converter can deliver a maximum current of 100mA: one output can be adjusted to deliver 100mA, while the other handles a very light load; or both outputs can be adjusted to deliver 50mA each with over 80% efficiency.

DOIhttp://doi.org/10.1109/ISSCC.2017.7870402
Indexed BySCI
Language英语
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000403393800143
Fulltext Access
Citation statistics
Cited Times [WOS]:8   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionINSTITUTE OF MICROELECTRONICS
Faculty of Science and Technology
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation1.University of Macau, China;
2.Hong Kong University of Science and Technology, Hong Kong;
3.Synopsys Macau Ltd, China;
4.Instituto Superior Tecnico, Universidade de Lisboa, Portugal
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Jiang, Junmin,Lu, Yan,Ki, Wing-Hung,et al. A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS[C]//Institute of Electrical and Electronics Engineers Inc.,2017:344-345.
Files in This Item:
There are no files associated with this item.
Related Services
Recommend this item
Bookmark
Usage statistics
Export to Endnote
Google Scholar
Similar articles in Google Scholar
[Jiang, Junmin]'s Articles
[Lu, Yan]'s Articles
[Ki, Wing-Hung]'s Articles
Baidu academic
Similar articles in Baidu academic
[Jiang, Junmin]'s Articles
[Lu, Yan]'s Articles
[Ki, Wing-Hung]'s Articles
Bing Scholar
Similar articles in Bing Scholar
[Jiang, Junmin]'s Articles
[Lu, Yan]'s Articles
[Ki, Wing-Hung]'s Articles
Terms of Use
No data!
Social Bookmark/Share
All comments (0)
No comment.
 

Items in the repository are protected by copyright, with all rights reserved, unless otherwise indicated.