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On the design of a programmable-gain amplifier with built-In compact DC-Offset cancellers for very low-voltage WLAN systems
Pui-In Mak1; Seng-Pan U1,2; Rui P. Martins1,3
2008-03
Source PublicationIEEE Transactions on Circuits and Systems I: Regular Papers
ISSN1549-8328
Volume55Issue:2Pages:496-509
Abstract

Two circuit techniques adopted in the design of an embedded programmable-gain amplifier (PGA) for very low-voltage (LV) wireless local-area network systems are presented. A switched-current-resistor (SCR) technique minimizes the bandwidth variation and the transient in gain tuning by stabilizing, concurrently, the PGA’s feedback factor and quiescent-operating point. Another technique, inside-opamp dc-offset canceller (DOC), embeds inside the PGA’s opamp a subthreshold-biased – integrator for extracting its output dc-offset, while negatively feeding the correction (current) signal back to the opamp at an inherent low-impedance node. The resultant main benefits are: 1) the chip area, for realizing the large time constant in dc-offset extraction, is very small and 2) the lower cutoff of the PGA and the DOC-induced nonlinearity and noise are all suppressed by an amount of the loop gain in closed-loop formation. A 1-V three-stage 52-dB gain range PGA reinforcing such two techniques was designed and fabricated in a 3.3-V 0.35- m CMOS process. It consumes 7.4 mW of power while measuring 0 2- s gain-switching transient and +8 4 dBm IIP3. The means of the lower and upper 3-dB cutoffs (averaged over 52-dB gain steps) are 2.25 kHz and 17.1 MHz, respectively.

KeywordCmos Constant Bandwidth (Bw) Dc-offset Canceller (Doc) Low Voltage (Lv) Programmable-gain Amplifier (Pga) Transient Wireless Local-area Network (Wlan)
DOIhttp://doi.org/10.1109/TCSI.2007.910643
URLView the original
Indexed BySCI
Language英语
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000254070000002
The Source to ArticleScopus
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Cited Times [WOS]:31   [WOS Record]     [Related Records in WOS]
Document TypeJournal article
CollectionUniversity of Macau
Corresponding AuthorPui-In Mak; Seng-Pan U; Rui P. Martins
Affiliation1.the Analog and Mixed-Signal VLSI Laboratory, University of Macau, Macao, China
2.the Chipidea Microelectronics (Macao) Limited, Macao, China and the University of Macau, Macao, China
3.the Instituto Superior Técnico (IST)/UTL, 1049 001 Lisbon, Portugal
First Author AffilicationUniversity of Macau
Corresponding Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Pui-In Mak,Seng-Pan U,Rui P. Martins. On the design of a programmable-gain amplifier with built-In compact DC-Offset cancellers for very low-voltage WLAN systems[J]. IEEE Transactions on Circuits and Systems I: Regular Papers,2008,55(2):496-509.
APA Pui-In Mak,Seng-Pan U,&Rui P. Martins.(2008).On the design of a programmable-gain amplifier with built-In compact DC-Offset cancellers for very low-voltage WLAN systems.IEEE Transactions on Circuits and Systems I: Regular Papers,55(2),496-509.
MLA Pui-In Mak,et al."On the design of a programmable-gain amplifier with built-In compact DC-Offset cancellers for very low-voltage WLAN systems".IEEE Transactions on Circuits and Systems I: Regular Papers 55.2(2008):496-509.
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