Please use this identifier to cite or link to this item: http://repository.umac.mo/handle/10692/2385
Title: A Fifth-Order 20-MHz Transistorized- -Ladder LPF With 58.2-dB SFDR, 68-uW/Pole/MHz Efficiency, and 0.13- Die Size in 90-nm CMOS
Authors: Chen, Yong
Mak, Pui In (麥沛然)
Zhang, Li
Qian, He
Wang, Yan
Issue Date: 1-Jan-2013
Publisher: IEEE Computer Society
Citation: IEEE Transactions on Circuits and Systems II: Express Briefs, Jan 2013, Vol. 60, Issue 1, p. 11-15
Abstract: A novel transistorized-LC-ladder low-pass filter (LPF) is realized by combining source followers with Q-enhanced floating differential active inductors. It features a small number of active devices to minimize the sources of nonlinearity and noise and a robust frequency response against process variations and device mismatches. A fifth-order 20-MHz LPF prototype is fabricated in 90-nm CMOS. It measures a 58.2-dB spurious-free dynamic range with 6.8 mW of power, which corresponds to a selectivity efficiency of 68-μW/pole/MHz favorably comparable with the state of the art. The die size is merely 0.13 mm2.
URI: http://hdl.handle.net/10692/2385
ISSN: 1549-7747
1558-3791
Keywords: Active inductor
CMOS
Continuous time
Floating differential active inductor (FDAI)
Low-pass filter (LPF)
Source follower (SF)
Access: View full-text via DOI

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