UM
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS
Wang,Wei1; Zhu,Yan1; Chan,Chi Hang1; Martins,Rui Paulo1,2,3
2018-10-01
Source PublicationIEEE Journal of Solid-State Circuits
ISSN00189200
Volume53Issue:10Pages:2783-2794
AbstractThis paper reports a continuous-time (CT) third-order delta-sigma modulator that features a single amplifier biquad (SAB) and a passive integrator to simplify the circuit to just one power hungry operation amplifier (opamp). Such setup not only relaxes the gain and bandwidth requirement of the opamp design but also enhances the overall modulator stability which enables a power-efficient loop filter implementation. We used an SAR architecture in the quantizer with an advanced feedback technique to alleviate its speed penalty. By incorporating the proposed CT complementary (CTC) opamp and an adaptive latch scheme in the DAC driver, the modulator attains a signal bandwidth of 10 MHz with 79.6-dB signal-to-noise and distortion ratio (SNDR) while only consuming 5.35 mW from 1.2-and 1.8-V power supplies. The prototype has a dynamic range of 84.5 dB and a Schreier FoM of 177.2 dB with an active area of 0.033 mm .
KeywordAnalog-to-digital conversion (ADC) continuous-time (CT) delta-sigma modulator DAC driver passive integrator single amplifier biquad (SAB)
DOI10.1109/JSSC.2018.2852326
URLView the original
Language英语
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Document TypeJournal article
CollectionUniversity of Macau
Corresponding AuthorZhu,Yan
Affiliation1.State Key Laboratory of Analog and Mixed-Signal VLSI,University of Macau,,Macao
2.Department of Electrical and Computer Engineering,Faculty of Science and Technology,University of Macau,,Macao
3.Instituto Superior Técnico,Universidade de Lisboa,,Lisbon,Portugal
First Author AffilicationUniversity of Macau
Corresponding Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Wang,Wei,Zhu,Yan,Chan,Chi Hang,et al. A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS[J]. IEEE Journal of Solid-State Circuits,2018,53(10):2783-2794.
APA Wang,Wei,Zhu,Yan,Chan,Chi Hang,&Martins,Rui Paulo.(2018).A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS.IEEE Journal of Solid-State Circuits,53(10),2783-2794.
MLA Wang,Wei,et al."A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS".IEEE Journal of Solid-State Circuits 53.10(2018):2783-2794.
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