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Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial V-cm-Based Switching
Xing, Dezhi; Zhu, Yan; Chan, Chi-Hang; Sin, Sai-Weng; Ye, Fan; Ren, Junyan; U, Seng-Pan; Martins, Rui Paulo
2017-03
Source PublicationIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
ISSN1063-8210
Volume25Issue:3Pages:1168-1172
AbstractThis brief presents a 7-bit 700-MS/s four-way time-interleaved successive approximation register (SAR) analog-to-digital converter (ADC). A partial V-cm-based switching method is proposed that requires less digital overhead from the SAR controller and achieves better conversion accuracy. Compared with switchback switching, the proposed method can further reduce the common mode variation by 50%. In addition, the impacts of such a reduction on the comparator offset, noise, and input parasitic are theoretically analyzed and verified by simulation. The prototype fabricated in a 65-nm CMOS technology occupies an active area of 0.025 mm(2). The measurement results at the 700 MS/s sampling rate show that the ADC achieves signal-to-noise-and-distortion ratio of 40 dB at Nyquist input and consumes 2.72 mW from a 1.2 V supply, which results in a Walden FoM of 48 fJ/conversion step.
KeywordCommon mode variation partial V-cm-based switching time-interleaved successive approximation register analog-to-digital converter (TI SAR ADC)
DOI10.1109/TVLSI.2016.2610864
URLView the original
Indexed BySCI
Language英语
WOS Research AreaComputer Science ; Engineering
WOS SubjectComputer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS IDWOS:000395894000034
PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
The Source to ArticleWOS
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被引频次[WOS]:4   [WOS记录]     [WOS相关记录]
Document TypeJournal article
专题University of Macau
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Xing, Dezhi,Zhu, Yan,Chan, Chi-Hang,et al. Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial V-cm-Based Switching[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,2017,25(3):1168-1172.
APA Xing, Dezhi.,Zhu, Yan.,Chan, Chi-Hang.,Sin, Sai-Weng.,Ye, Fan.,...&Martins, Rui Paulo.(2017).Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial V-cm-Based Switching.IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,25(3),1168-1172.
MLA Xing, Dezhi,et al."Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial V-cm-Based Switching".IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 25.3(2017):1168-1172.
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