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LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study
Chee Cheow Lim1; Harikrishnan Ramiah1; Jun Yin2; Pui-In Mak2; Rui P. Martins2,3
2017-06
Source PublicationANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
ISSN0925-1030
Volume91Issue:3Pages:497-502
Abstract

This letter studies and compares class-B VCOs using spiral inductors with the proposed dual-layer patterned floating shield (DL-PFS) and conventional single-layer patterned floating shield (SL-PFS). The proposed DL-PFS technique utilizes two lowest metal layers to effectively reduce the capacitive induced current to the substrate in an on-chip spiral inductor, thereby boosts its Q-factor by 40% when compared with the conventional SL-PFS approach. We fabricated, as a proof of concept, the class-B LC-VCOs using the DL-PFS and SL-PFS in 0.13 A mu m CMOS. Operating at 10 GHz, the VCO with the DL-PFS inductor measures a 3.6 dB phase noise (PN) improvement at the same power consumption of 2.12 mW. Specifically, the VCO with DL-PFS inductor is tunable from 9.3-to-10.1 GHz and measured PN at 10 GHz is -132.5 dBc/Hz at 10 MHz offset while consuming 2.12 mW at the lowest 0.6 V supply. The achieved figure-of-merit (187.4 dBc/Hz@1 MHz offset) compares favorably with the recent state-of-the-art.

KeywordInductor Patterned Floating Shield Substrate Cmos Vco
DOI10.1007/s10470-017-0958-7
URLView the original
Indexed BySCI
Language英语
WOS Research AreaComputer Science ; Engineering
WOS SubjectComputer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS IDWOS:000400195500014
PublisherSPRINGER
The Source to ArticleWOS
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Document TypeJournal article
专题INSTITUTE OF MICROELECTRONICS
Corresponding AuthorHarikrishnan Ramiah
Affiliation1.University of Malaya, Kuala Lumpur, Malaysia
2.State-Key Laboratory of Analog & Mixed-Signal VLSI, and Faculty of Science & Technology, Department of Electrical and Computer Engineering, University of Macau, Macao, China
3.Instituto Superior Te´cnico, Universidade de Lisboa, Lisboa 1049-001, Portugal
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Chee Cheow Lim,Harikrishnan Ramiah,Jun Yin,et al. LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING,2017,91(3):497-502.
APA Chee Cheow Lim,Harikrishnan Ramiah,Jun Yin,Pui-In Mak,&Rui P. Martins.(2017).LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study.ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING,91(3),497-502.
MLA Chee Cheow Lim,et al."LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study".ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 91.3(2017):497-502.
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