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Analog to digital converter circuit
Yan Zhu1; Chi Hang Chan1; Sai Weng Sin1; Seng Pan U1; Rui Paulo da Silva Martins1; Franco Maloberti2
2014-02-25
Rights HolderUNIVERSITY OF MACAU
Date Available2014-02-25
CountryUnited States
Subtype发明专利
Contribution Rank1
Abstract

The present invention provides a pipelined-successive approximation register (SAR) analog-to-digital converter(ADC) circuit with decoupled flip-around MDAC, capacitive attenuation solution and self-embedded offset cancellation. The flip-around MDAC architecture is built for low inter-stage gain implementation. A capacitive attenuation solution is provided for minimizing the power dissipation and optimizing conversion speed. The design reuses SAR ADC to perform offset cancellation, which significantly saves calibration area, power and time.

Application Date2012-11-13
Patent NumberUS8659461B1
Language英语
Status已授权
Application NumberUS13675387
Open (Notice) NumberUS8659461B1
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Document TypePatent
专题Faculty of Science and Technology
INSTITUTE OF MICROELECTRONICS
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation1.UNIVERSITY OF MACAU
2.Torre d' Isola IT
First Author AffilicationUniversity of Macau
推荐引用方式
GB/T 7714
Yan Zhu,Chi Hang Chan,Sai Weng Sin,et al. Analog to digital converter circuit. US8659461B1[P]. 2014-02-25.
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