UM  > 科技學院  > 電機及電腦工程系
On-Chip Unsteady Reference Voltage Compensation Techniques for Very-High-Speed Pipelined ADC
Weng-Ieng Mok1; Pui-In Mak1; Seng-Pan U1,2; R. P. Martins1,3
2005-06
Conference NameRegional Inter-University Postgraduate Electrical and Electronic Engineering Conference (RIUPEEEC)
Source PublicationProc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2005
Pages276-280
Conference DateJun. 2005
Conference PlaceHong Kong, China
Abstract

The operating principle of pipelined analog-to-digital converter (ADC) is to subtract, sequentially along the cascaded stages, different reference voltages from the analog sample. This operation, nevertheless, creates internally an input-dependent fluctuation on the reference voltage. Such kind of signal-dependent error cannot be eliminated by trimming and/or calibration. The effect is especially significant at very-high conversion rate, since conventional method for stabilizing the reference voltage with large off-chip capacitor is no longer appropriate, as such a capacitor will resonate with the package inductance. However, on-chip generates a stable and high-speed reference not only consumes large power and area, but also makes the reference voltage highly sensitive to internal noises. This paper, first, presents an in-depth investigation on the causes and effects of unsteady reference voltage. Then, an effective model scheme is carried out and verified by circuit simulations. Finally, two on-chip reference voltage compensation techniques, which can effectively eliminate the error without the aforementioned drawbacks and feature compact in size, are proposed

KeywordHigh-speed Pipelined Analog-to-digital Converter Reference Voltage Voltage Buffer
URLView the original
Language英语
Fulltext Access
Document TypeConference paper
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Faculty of Science and Technology
Affiliation1.Analog and Mixed-Signal VLSI Laboratory, FST, University of Macau, Macao, China
2.Also with Chipidea Microelectronics (Macau) Limited
3.On leave from Instituto Superior Técnico (IST)/UTL, Lisbon, Portugal
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Weng-Ieng Mok,Pui-In Mak,Seng-Pan U,et al. On-Chip Unsteady Reference Voltage Compensation Techniques for Very-High-Speed Pipelined ADC[C],2005:276-280.
Files in This Item:
There are no files associated with this item.
Related Services
Recommend this item
Bookmark
Usage statistics
Export to Endnote
Google Scholar
Similar articles in Google Scholar
[Weng-Ieng Mok]'s Articles
[Pui-In Mak]'s Articles
[Seng-Pan U]'s Articles
Baidu academic
Similar articles in Baidu academic
[Weng-Ieng Mok]'s Articles
[Pui-In Mak]'s Articles
[Seng-Pan U]'s Articles
Bing Scholar
Similar articles in Bing Scholar
[Weng-Ieng Mok]'s Articles
[Pui-In Mak]'s Articles
[Seng-Pan U]'s Articles
Terms of Use
No data!
Social Bookmark/Share
All comments (0)
No comment.
 

Items in the repository are protected by copyright, with all rights reserved, unless otherwise indicated.