UM  > 科技學院  > 電機及電腦工程系
A Programmable Switched-Capacitor A-DQS Frequency Downconverter for Two-Step Channel Selection Wireless Receiver
Mak, PI; U, SP; Martins, RP
2003
Conference Name5th International Conference on ASIC
Source Publication2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS
Pages573-576
Conference DateOCT 21-24, 2003
Conference PlaceBeijing, PEOPLES R CHINA
Abstract

This paper presents a combined half- and full-delay switched-capacitor frequency downconverter with embedded channel selection function through aprogrammable analog-double quadrature sampling (A-DQS) technique. With such circuit operating in a complex low-IF wireless receiver back-end. the IF-to-baseband frequency down-conversion of the desired channel or its image can be effectively selected to the baseband to relax the settling time and phase noise requirements of the front-end frequency synthesizer Moreover. such circuit also allows 1/Q multiplexing for the following A/D converter and then minimizes the image problem due to 1/Q mismatch. The prototype circuit is designed and verified in CADENCE(TM) environment with the parameters of a0.35-mum CMOS process.

Indexed BySCI
Language英语
WOS Research AreaComputer Science ; Engineering
WOS SubjectComputer Science, Hardware & Architecture ; Engineering, Manufacturing ; Engineering, Electrical & Electronic
WOS IDWOS:000189408900130
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Citation statistics
Document TypeConference paper
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Faculty of Science and Technology
AffiliationUniv Macau, Fac Sci & Technol, Mixed Signal VLSI Lab, MSVLSI, Taipa, Macau, Peoples R China
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Mak, PI,U, SP,Martins, RP. A Programmable Switched-Capacitor A-DQS Frequency Downconverter for Two-Step Channel Selection Wireless Receiver[C],2003:573-576.
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