UM
A digital SC converter with high efficiency and low voltage ripple
Jiang J.1; Ki W.-H.1; Lu Y.2
2018-02-20
Source PublicationProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume2018-January
Pages289-290
AbstractA switched-capacitor DC-DC converter with a low output voltage ripple and high efficiency is presented in this summary. To achieve a wide input and output voltage range, a 3-clock-phase operation is proposed to achieve 6 voltage conversion ratios (VCRs) with only two discrete flying capacitors. A digital ripple reduction scheme is utilized to achieve up to four times reduction in output voltage ripple. The digital design also improves the design flexibility. The converter can deliver a 250mW maximum power to a wide output range of 0.5 V to 3 V with an input range of 1.6 V to 3.3 V, and achieves a peak efficiency of 91%.
DOI10.1109/ASPDAC.2018.8297324
URLView the original
Language英語
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Document TypeConference paper
CollectionUniversity of Macau
Affiliation1.Hong Kong University of Science and Technology
2.Universidade de Macau
Recommended Citation
GB/T 7714
Jiang J.,Ki W.-H.,Lu Y.. A digital SC converter with high efficiency and low voltage ripple[C],2018:289-290.
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