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A 64 fJ/step 9-bit SAR ADC array with forward error correction and mixed-signal CDS for CMOS image sensors
Chen D.G.1; Tang F.3; Law M.-K.2; Zhong X.1; Bermak A.1
2014-11-01
Source PublicationIEEE Transactions on Circuits and Systems I: Regular Papers
ISSN15498328
Volume61Issue:11Pages:3085-3093
Abstract

A 9 b Successive-Approximation-Register (SAR) Anglog-to-Digital Converter (ADC) with pilot-Digital-to-Analog Converter (pDAC) technique for image sensor applications is described in this paper}. Its Forward Error Correction (FEC) improves its robustness against device mismatch. It performs mixed-signal Correlated-Double-Sampling (CDS) using only the ADC's built-in capacitor array without any additional amplifier or memory. The ADC measures 490μ{\rm m}\times 7.4μ{\rm m} and is demonstrated in a low-power CMOS image sensors with column parallel ADCs. Measurement results from the prototype image sensor in 0.18μ{\rm m} technology shows that the ADC's Differential Non-Linearity (DNL) is reduced from 3.5 LSB to 1.2 LSB by its mixed-signal FEC algorithm, making its Figure-of-Merit (FoM) 64 fJ/step. Furthermore, when combined with the ADC's mixed-signal Correlated-Double-Sampling, the column FPN is reduced from 3.2% to 0.5% without any additional circuit.

KeywordCmos Image Sensor (Cis) Column-parallel Sar Adc Correlated Double Sampling (Cds) Error Correction Single-ended Adc
DOI10.1109/TCSI.2014.2334852
URLView the original
Indexed BySCI
Language英语
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000344467500004
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Cited Times [WOS]:26   [WOS Record]     [Related Records in WOS]
Document TypeJournal article
CollectionINSTITUTE OF MICROELECTRONICS
Corresponding AuthorChen D.G.; Tang F.; Law M.-K.; Zhong X.; Bermak A.
Affiliation1.Hong Kong University of Science and Technology
2.Universidade de Macau
3.Chongqing University
Recommended Citation
GB/T 7714
Chen D.G.,Tang F.,Law M.-K.,et al. A 64 fJ/step 9-bit SAR ADC array with forward error correction and mixed-signal CDS for CMOS image sensors[J]. IEEE Transactions on Circuits and Systems I: Regular Papers,2014,61(11):3085-3093.
APA Chen D.G.,Tang F.,Law M.-K.,Zhong X.,&Bermak A..(2014).A 64 fJ/step 9-bit SAR ADC array with forward error correction and mixed-signal CDS for CMOS image sensors.IEEE Transactions on Circuits and Systems I: Regular Papers,61(11),3085-3093.
MLA Chen D.G.,et al."A 64 fJ/step 9-bit SAR ADC array with forward error correction and mixed-signal CDS for CMOS image sensors".IEEE Transactions on Circuits and Systems I: Regular Papers 61.11(2014):3085-3093.
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