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A Simulink-to-FPGA Co-Design of Encryption Module
Xiaoying Li1; Fuming Sun2; Enhua Wu1,3
2006-12-01
Conference NameIEEE Asia Pacific Conference on Circuits and Systems
Source PublicationAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Pages2008-2011
Conference Date4-7 Dec. 2006
Conference PlaceSingapore, Singapore
Publication PlaceNEW YORK
PublisherIEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA
Abstract

In this paper, circuit design of an arithmetic module applied to cryptography - Modulo Multiplicative Inverse is presented and implemented using FPGA hardware technology. This modular arithmetic function contains iterative computations of division, multiplication and accumulation with variable loop times. Besides standard HDL programming and schematic input, Simulink-to-FPGA has been tried as a different design flow. Experimental results are compared between different design methods with discussion of their pros and cons. 

KeywordArithmetic Unit Fpga Modulo Simulink
DOIhttps://doi.org/10.1109/APCCAS.2006.342282
URLView the original
Indexed BySCI
Language英语
WOS Research AreaComputer Science ; Engineering ; Telecommunications
WOS SubjectComputer Science, Hardware & Architecture ; Engineering, Electrical & Electronic ; Telecommunications
WOS IDWOS:000246793200501
Fulltext Access
Citation statistics
Cited Times [WOS]:1   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionFaculty of Science and Technology
Affiliation1.Department of Computer and Information Science, FST, University of Macau, Macao, China
2.School of Information Engineering, University of Science and Technology, Beijing, China
3.State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing, China
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Xiaoying Li,Fuming Sun,Enhua Wu. A Simulink-to-FPGA Co-Design of Encryption Module[C]. NEW YORK:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA,2006:2008-2011.
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