UM
A 14-Bit Split-Pipeline ADC with Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current
Mao J.1; Guo M.1; Sin S.-W.1; Martins R.P.1
2018-10-01
Source PublicationIEEE Transactions on Circuits and Systems II: Express Briefs
ISSN15497747
Volume65Issue:10Pages:1380-1384
AbstractPipeline analog-to-digital converters (ADCs), which dominated high-speed and high-resolution applications, suffered from weak improvement in power efficiency. To address such a problem, this brief presents a 14-bit split-pipeline opamp-sharing ADC, with background calibration that optimizes duty-cycle ratio and amplifier power consumption in the shared opamp. Based on the interstage gain (that includes settling) error estimated by the split ADC calibration engine, the clock duty-cycle ratio and the bias current are adjusted to achieve better dynamic settling and resolution trade-offs. Operating at 100 MS/s with a 9-MHz input signal, the ADC achieves 46.5 dB of signal-to-noise-and-distortion ratio (SNDR) and 59.6 dB of spurious-free dynamic range (SFDR) before calibration, and after calibration, it improves to 71.7 dB of SNDR and 84.4 dB of SFDR, respectively. The ADC maintains an SNDR over 68.5 dB within the full Nyquist bandwidth consuming 32 mW of power, which yields a Walden figure-of-merit (FoM) of 147.2 fJ/conversion-step and a Schreier FoM of 160.4 dB.
KeywordAnalog-to-digital conversion digital background calibration opamp-sharing technique pipelined ADC split ADC
DOI10.1109/TCSII.2018.2851944
URLView the original
Language英語
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Document TypeJournal article
CollectionUniversity of Macau
Affiliation1.Universidade de Macau
2.Instituto Superior Técnico
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Mao J.,Guo M.,Sin S.-W.,et al. A 14-Bit Split-Pipeline ADC with Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current[J]. IEEE Transactions on Circuits and Systems II: Express Briefs,2018,65(10):1380-1384.
APA Mao J.,Guo M.,Sin S.-W.,&Martins R.P..(2018).A 14-Bit Split-Pipeline ADC with Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current.IEEE Transactions on Circuits and Systems II: Express Briefs,65(10),1380-1384.
MLA Mao J.,et al."A 14-Bit Split-Pipeline ADC with Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current".IEEE Transactions on Circuits and Systems II: Express Briefs 65.10(2018):1380-1384.
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