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A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μm CMOS
U S.-P.3; Martins R.P.3; Franca J.E.2
2004
Source PublicationIEEE Journal of Solid-State Circuits
ISSN00189200
Volume39Issue:1Pages:87-99
Abstract

A switched-capacitor (SC) bandpass interpolating filter is proposed with the capability of achieving, simultaneously, channel selection and frequency up-translation, together with sampling rate increase, in a multirate configuration at high frequency. This filter has been designed for efficient use in a direct-digital frequency synthesis (DDFS) system with considerable rewards in terms of speed reduction of the digital core plus the digital-to-analog converter (DAC), as well as in the relaxation of the continuous-time (CT) smoothing filter order. It exhibits a 15-tap finite impulse response (FIR), with a bandpass frequency response centered at 57 MHz and a stop-band rejection higher than 45 dB. At the same time, it translates 22-24 MHz input signals at 80 MS/s, to the frequency range of 56-58 MHz in the output at 320 MS/s, allowing also a perfect operation at 400 MS/s, in 0.35-μm CMOS technology. To implement a specific multi-notch FIR function, the filter architecture will comprise an effective low-speed polyphase-based interpolation structure with autozeroing capability, high-speed SC circuitry with fast opamps, and also ultra-low timing-skew multiple phase generation in order to achieve high-performance operation at high frequency. The prototype ICs present a signal-to-noise-and-distortion ratio (SNDR) of 61 dB, with a dynamic range of 69 dB, for 1% THD, and 61 dB, for 1% IM3. It consumes 2 mm of active silicon area, 120 mW (analog) and 16 mW (digital) power, with a single 2.5-V supply, which corresponds to 8.6 mW of analog power per zero.

KeywordAutozeroing Bandpass Cmos Analog Integrated Circuits Direct-digital Synthesis Filters Frequency-translated Filtering Interpolation Multirate Signal Processing Sampled Data Circuits Signal Sampling/reconstruction Switched-capacitor Filters
DOIhttp://doi.org/10.1109/JSSC.2003.820855
URLView the original
Indexed BySCI
Language英语
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000188205500009
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被引频次[WOS]:1   [WOS记录]     [WOS相关记录]
Document TypeJournal article
专题Faculty of Science and Technology
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation1.MIPSABG Chipidea, Lda., Portugal
2.Instituto Superior Técnico
3.Universidade de Macau
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U S.-P.,Martins R.P.,Franca J.E.. A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μm CMOS[J]. IEEE Journal of Solid-State Circuits,2004,39(1):87-99.
APA U S.-P.,Martins R.P.,&Franca J.E..(2004).A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μm CMOS.IEEE Journal of Solid-State Circuits,39(1),87-99.
MLA U S.-P.,et al."A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μm CMOS".IEEE Journal of Solid-State Circuits 39.1(2004):87-99.
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