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A time-efficient dither-injection scheme for pipelined SAR ADC
Wang R.2; Chio U.-F.3; Chan C.-H.3; Ding L.3; Sin S.-W.3; Seng-Pan U.3; Wang Z.2; Martins R.P.1,3
2011-12-05
Conference Name2011 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics
Source PublicationAsia Pacific Conference on Postgraduate Research in Microelectronics and Electronics
Pages9-12
Conference Date6-7 Oct. 2011
Conference PlaceMacau, China
Abstract

This paper presents a time-efficient dither-injection scheme in digital domain for pipelined successive approximation register analog-to-digital converter (SAR ADC). Compared with the conventional dither injection method, the proposed method can achieve faster injection speed and reduce the disturbance during the quantization of the ADC. Only 1 LSB dither injection is discussed in this method. Simulation results show more than 8 times speed improvement comparing to the conventional configuration. © 2011 IEEE.

KeywordDigital Calibration Dither Injection Pipelined Sar Adc
DOIhttp://doi.org/10.1109/PrimeAsia.2011.6075058
URLView the original
Indexed BySCI
Language英语
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Document TypeConference paper
CollectionINSTITUTE OF MICROELECTRONICS
Faculty of Science and Technology
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation1.Instituto Superior Técnico
2.Tsinghua University
3.Universidade de Macau
Recommended Citation
GB/T 7714
Wang R.,Chio U.-F.,Chan C.-H.,et al. A time-efficient dither-injection scheme for pipelined SAR ADC[C],2011:9-12.
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