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Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters
Chen-Yan Cai1; Yang Jiang1; Sai-Weng Sin1; Seng-Pan U1,2; Rui P. Martins1
2013-07-01
Source PublicationAnalog Integrated Circuits and Signal Processing
ISSN0925-1030
Volume76Issue:1Pages:35-46
Abstract

The design and optimization methodology for CT ΣΔ modulators with hybrid Active-Passive (AP) loop-filters is indicated in this work. From the discussion, by appropriately scaling the passive filter gain and cooperating with a single-bit quantizer, the hybrid AP loop filtering can achieve an approximated noise-shaping function as a fully active ΔΣ modulator with the same order. The ELD effect in the hybrid AP CT ΔΣ modulator which influences the poles and zeros locations of the Noise Transfer Function (NTF) in the modulator is depicted. This paper also investigates the feasibility of applying the ELD compensation techniques that were used to be implemented in the active integrator's case to the hybrid AP CT ΔΣ modulator; however, some of them cannot be practically applied since the passive loop-filter cannot perform proportional feedback signal summation. After the discussion and analysis, the technique similar to Vadipour et al. (In: Symposium on VLSI circuits digest of technical papers, 2008) can be easily implemented at circuit-level and after applying it, there is one additional zero to compensate the peak in the NTF. With the help of this technique, the maximum quantizer delay tolerance can be a full clock period. The mentioned ELD compensation technique was applied in a 2nd order CT ΔΣ modulator with an active-RC integrator as the 1st stage and a passive RC filter as the 2nd stage, which was verified by transistor-level simulations in 65 nm CMOS. The circuit exhibits either 67.3 dB or 65.3 of SNDR, under the effect of half clock period or one clock period ELD, respectively; by contrast, without compensation, the system is unstable with both half or one clock period ELD effect. The designed hybrid CT ΔΣ modulator achieves 2 MHz signal bandwidth and consumes 2.54 mW of power. © 2013 The Author(s).

KeywordCt Δς Modulator Excess-loop-delay Compensation Techniques For Hybrid Active-passive Loop-filter Excess-loop-delay For Hybrid Active-passive Loop-filter Hybrid Active-passive Loop-filter
DOIhttp://doi.org/10.1007/s10470-013-0069-z
URLView the original
Indexed BySCI
Language英语
WOS Research AreaComputer Science ; Engineering
WOS SubjectComputer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS IDWOS:000320888500004
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Cited Times [WOS]:0   [WOS Record]     [Related Records in WOS]
Document TypeJournal article
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Corresponding AuthorChen-Yan Cai
Affiliation1.State Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Macao, China
2.Chipidea Microelectronics (Macau) Limited, Macao, China
First Author AffilicationFaculty of Science and Technology
Corresponding Author AffilicationFaculty of Science and Technology
Recommended Citation
GB/T 7714
Chen-Yan Cai,Yang Jiang,Sai-Weng Sin,et al. Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters[J]. Analog Integrated Circuits and Signal Processing,2013,76(1):35-46.
APA Chen-Yan Cai,Yang Jiang,Sai-Weng Sin,Seng-Pan U,&Rui P. Martins.(2013).Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters.Analog Integrated Circuits and Signal Processing,76(1),35-46.
MLA Chen-Yan Cai,et al."Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters".Analog Integrated Circuits and Signal Processing 76.1(2013):35-46.
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