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A 0.0013mm2 3.6µW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin
Zushu Yan1; Pui-In Mak1,2; Man-Kay Law1,2; Rui Martins1,2,3; Franco Maloberti4
2014
Conference Name1st IEEE International Solid-State Circuits Conference (ISSCC)
Source Publication2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)
Pages288-289
Conference Date9-13 Feb. 2014
Conference PlaceSan Francisco, CA, USA
Other Abstract

For active-matrix LCDs [1] that have thousands of buffer amplifiers integrated in its column-driver ICs, ultra-low power and area circuit solutions are continuously urged to meet the market pressure on cost, image quality and display size. Multi-stage amplifiers have dominated those buffers due to their reliable DC gain, output swing, gain-bandwidth product (GBW) and slew rate (SR). Yet, different kinds of frequency compensation are also useful for stability, bottlenecking the capacitive-load (CL) drivability, power and area efficiencies.

DOIhttp://doi.org/10.1109/ISSCC.2014.6757437
URLView the original
Indexed BySCI
Language英语
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000353615000115
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Citation statistics
Cited Times [WOS]:1   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
INSTITUTE OF MICROELECTRONICS
Affiliation1.University of Macau, Macao, China,
2.UMTEC, Macao, China,
3.Instituto Superior Tecnico, Lisbon, Portugal,
4.University of Pavia, Pavia, Italy
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Zushu Yan,Pui-In Mak,Man-Kay Law,et al. A 0.0013mm2 3.6µW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin[C],2014:288-289.
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