Browsing by Author Chio, U Fat

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Showing results 1 to 18 of 18
Issue DateTitleAuthor(s)
2010-06A 10-bit 100-MS/s Reference-Free SAR ADC in 90nm CMOSZhu, Yan (朱燕); Chan, Chi Hang (陳知行); Chio, U Fat; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願); Maloberti, Franco
2010-09An 11b 60MS/S 2.1mW two-step time-interleaved SAR-ADC with reused S&HSin, Sai Weng (冼世榮); Ding, Li; Zhu, Yan (朱燕); Wei, He Gong; Chan, Chi Hang (陳知行); Chio, U Fat; U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願); Maloberti, Franco
2013-08A 2.3 mw 10-bit 170 ms/s two-step binary-search assisted time-interleaved SAR ADCWong, Si Seng; Chio, U Fat; Zhu, Yan; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva
2011-11-16A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparatorsWong, Si-Seng; Chio, U Fat; Chan, Chi Hang (陳知行); Choi, Hou Lon; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願)
2011-09A 7-bit 300-MS/s subranging ADC with embedded threshold & gain-loss calibrationChio, U Fat; Chan, Chi Hang (陳知行); Choi, Hou Lon; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願)
2011-08A charge pump based timing-skew calibration for time-interleaved ADCZhang, Peng (張鵬); Chen, Zhi Jie (陳志杰); Wei, He Gong (魏和功); Chio, U Fat; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva; Wang, Zhi Hua
2009-11Comparator-based successive folding ADCChio, U Fat; Choi, Hou Lon; Chan, Chi Hang (陳知行); Wong, Si Seng; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva
2010-08Design and experimental verification of a power effective flash-SAR subranging ADCChio, U Fat; Wei, He Gong; Zhu, Yan (朱燕); Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願); Maloberti, Franco
2012-12-02Design techniques for nanometer wideband power-efficient CMOS ADCsU, Seng Pan (余成斌); Sin, Sai Weng (冼世榮); Zhu, Yan (朱燕); Chio, U Fat; Wei, He Gong (魏和功); Martins, Rui Paulo Da Silva
2011-08FPGA-based decoupled double synchronous reference frame PLL for active power filtersSun, Bo; Dai, Ning Yi (戴寧怡); Chio, U Fat; Wong, Man Chung (黃民聰); Wong, Chi Kong (黃志剛); Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, R. P.
2011-10A FPGA-based power electronics controller for hybrid active power filtersSun, Bo; Chio, U Fat; Lam, Chi Seng (林智聲); Dai, Ning Yi (戴寧怡); Wong, Man Chung (黃民聰); Wong, Chi Kong (黃志剛); Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願)
2010-04-01Linearity analysis on a series-split capacitor array for high-speed SAR ADCsZhu, Yan (朱燕); Chio, U Fat; Wei, He Gong; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願)
2010-11A process-insensitive current-controlled delay generator with threshold voltage compensationWei, He Gong; Chio, U Fat; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願)
2010-01A rapid power-switchable track-and-hold amplifier in 90-nm CMOSWei, He Gong; Chio, U Fat; Zhu, Yan (朱燕); Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva
2011-11-16A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOSChan, Chi Hang (陳知行); Zhu, Yan (朱燕); Chio, U Fat; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願)
2013Split-SAR ADCs: improved linearity with power and speed optimizationZhu, Yan (諸嫣); Chan, Chi Hang; Chio, U Fat; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva; Maloberti, Franco
2010-12An ultra low power 9-bit 1-MS/s pipelined SAR ADC for bio-medical applicationsYin, Guo He; Chio, U Fat; Wei, He Gong; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva; Wang, Zhi Hua
2009-11A voltage-controlled capacitance offset calibration technique for high resolution dynamic comparatorChan, Chi Hang (陳知行); Zhu, Yan (朱燕); Chio, U Fat; Sin, Sai Weng (冼世榮); U, Seng Pan (余成斌); Martins, Rui Paulo Da Silva (馬許願)